MICROPROCESSOR an enhanced version of 8085Microprocessor that was

MICROPROCESSOR TECHNIQUES LAB ASSIGNMENT: 1STUDY OF 8086 MICROPROCESSOR ARCHITECTURE OF8086:8086Microprocessor is an enhanced version of 8085Microprocessor that was designedby Intel in 1976. It is a 16-bit Microprocessor that has 20 address lines and16data lines that provides up to storage of 1MB.The lower 16bit address lines aremultiplexed with the 16bit data lines. Since there are 20bit address lines,8086 can access up to 1GB of physical memory.

It consists of powerfulinstruction set, which provides the ease of performing operations likemultiplication and division. Also microprocessors do not have inbuilt memory.Princeton architecture is used for microprocessors where data and programmemory are combined in a single memory interface.Internal Architecture Of 8086Thearchitecture of 8086 is divided into two units: 1) Bus Interface Unit (BIU)                                                                            2) Execution Unit (EU)BUS INTERFACEUNIT (BIU):·       The Bus Interface unit provides the interface between themicroprocessor and the external memory (RAM/ROM).·       BIU generates 20bit physical memory address.

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·       BIU is responsible for transferring all the data and addresses onthe buses.·        It is also responsible forfetching instructions from the memory, reading data from the ports, as well aswriting data to the ports and the memory.·       Functional parts of BIU: 1.INSTRUCTION QUEUE:-BIU containsthe instruction queue.-BIU gets up to6 bytes of next instruction in advance and stores it in the instruction queue.-When theExecution Unit (EU) is ready to execute the next instruction it directly                                                       reads the instruction from theinstruction queue.- It helps tospeed up the execution as the EU need not wait for the external   memory to send the instruction.- The processof fetching the next instruction while the current instructions executes iscalled Pipelining.

 2.    SEGMENTREGISTER:-SegmentRegister holds the addresses of instructions and data in the memory.-Theseaddresses are used by the processor to access memory locations.-SegmentRegisters also contains 1 pointer register IP, which holds the address of thenext instruction to be performed by the EU.

-BIU has 4segment buses:  i.e. CS, DS, SS & ES.

-CS: It stands for Code Segment.It is used for addressing a memory location in the code segment of the memory,where the executable program is stored.-DS:It stands for Data Segment. It consists the date used by the program.-SS:It stands for Stack Segment. It handles the memory to store data duringexecution.

-ES:It stands for Extra Segment. It is the additional data segment used bystring to hold extra destination data. 3.     INSTRUCTIONPOINTER (IP) : -It is a 16 bitregister used to hold the address of the next instruction to be executed.-The value stored in InstructionPointer is referred to as “offset”. EXECUTION UNIT (EU):·       It gives instructions to BIU stating from where to fetch data andthen decode and execute the instructions.

·       It also controls the operations on the data and uses instructiondecoder and ALU to do the same.·       EU has no direct connection with the system buses.·       Operations are performed over data through BIU.·       Functional parts of EU are:    1.    ALU:-Handles all the arithmetic and logical operations likeaddition(+),subtraction(-), multiplication(*),division(/),AND,OR,NOT. 2.    FLAG REGISTER:-It is a 16bit register which behaves like a flip-flop.

-It changes its result according to the result stored in theaccumulator.-There are 9flags divided into 2 groups i.e. a) Conditional flags                                                                      b) Control flags 3.

    CONDITIONALFLAGS:-Shows the result of the last arithmetic or logical instructionexecuted.-There are 6 Conditional Flags mentioned as follows:- CarryFlag: Indicates an overflow condition for arithmetic operations.- AuxiliaryFlag: The processor uses this flag to perform binary to BCD   conversion.- ParityFlag: Used to indicate the parity of the result. Whenthe lower order 8-bits of the result contains evennumber of 1’s, then the Parity Flag is set. For odd number of 1’s, the ParityFlag is reset.-Zero Flag: The flag is set to 1 when the result of arithmetic or logicaloperation is zero or else it is set to zero.

– Sign Flag: This flags holds the sign of the result. When the result isnegative it is set to 1 else set to 0.-OverflowFlag: Flag represents the result when the system capacity is exceeded. 4.    CONTROL FLAGS:-Controls the operations of the Execution Unit.-There are 3 types of Control Flags:-Trap Flag: Used forsingle step control and also allows the user to execute one instruction at thetime for debugging.

-Interrupt Flag: It isand enable/disable flag.  Use toallow/prohibit the interruption of a program. For interrupt enabled conditionit is set to 1 or else set to 0.-Direction Flag: Used instring operation.

Set the string bytes from higher memory access to the lowermemory address or vice-a-versa. 5.    GENERAL PURPOSEREGISTER:-There are 8 General Purpose Registers.-They are: AH, AL, BH, BL, CH, CL, DH and DL.-The registers individually stores 8-bit data and are used in pairsto store 16bit data.-It is as a paired referred as AX, BX, CX and DX.

-AX Register: Known asAccumulator Register and used to store operands for arithmetic operations.-BX Register: Known asBase Register and stores the starting base address of the memory area withinthe data segment.-CXRegister: Referred as Counter. Used in loopinstruction to store loop counter.-DX Register: Used tohold I/O port address for I/O instruction.

 6.    STACK POINTER: -A 16bit Register holds the address from the start of the segmentto the memory location.-The most recent word is stored on the stack.